Quantum computing is a devilishly complex technology, with many technical hurdles impacting its development. Of these challenges, two critical points stand out: miniaturization and the quality of qubits.
IBM has adopted the superconducting qubit road map to reach a 1,121 qubit processor by 2023, leading to the expectation that 1,000 qubits in today’s qubit form factor are doable. However, current approaches will require very large chips (50mm per side or larger) at the scale of small wafers, or the use of chiplets on multichip modules. While this approach works, the goal is to achieve a better path to scalability.
Now the MIT researchers have been able to both reduce the size of the qubits and do so in a way that reduces the interference that occurs between neighboring qubits. Researchers at MIT have increased the number of superconducting qubits that can be added to a device by a factor of 100.
“We are dealing with both qubit miniaturization and quality,” said William Oliver, director of MIT’s Center for Quantum Engineering. “Unlike traditional transistor scaling, where only the number really matters, for qubits large numbers aren’t enough, they also need to be high-performance. Sacrificing performance for the number of qubits is not a useful trade-off in quantum computing. They must go hand in hand “.
The key to this large increase in qubit density and reduction in interference lies in the use of two-dimensional materials, particularly the 2D hexagonal boron nitride (hBN) insulator. MIT researchers have shown that some atomic monolayers of hBN can be stacked to form the insulator in the capacitors of a superconducting qubit.
Just like other capacitors, the capacitors of these superconducting circuits take the form of a sandwich in which an insulating material is sandwiched between two metal plates. The big difference for these capacitors is that superconducting circuits can only operate at extremely low temperatures, below 0.02 degrees above absolute zero (-273.15 ° C).
Superconducting qubits are measured at temperatures up to 20 millikelvin in a dilution refrigerator.Nathan Fiske / MIT
In that environment, the insulating materials available for work, such as PE-CVD silicon oxide or silicon nitride, have some flaws that are too damaging for quantum computing applications. To get around these material deficiencies, most superconducting circuits use what are called coplanar capacitors. In these capacitors, the plates are placed sideways to each other, rather than one above the other.
Consequently, the intrinsic silicon substrate beneath the plates and, to a lesser extent, the vacuum above the plates act as the dielectric of the capacitor. Intrinsic silicon is chemically pure and therefore has few defects and the large size dilutes the electric field at the interfaces of the plates, which all leads to a low-loss capacitor. The lateral dimension of each plate in this open face design ends up being quite large (typically 100 x 100 micrometers) to achieve the required capacity.
In an effort to move away from the large lateral configuration, MIT researchers have embarked on a search for an insulator that has very few defects and is compatible with superconducting capacitor plates.
“We chose to study hBN because it is the most widely used insulator in 2D materials research due to its cleanliness and chemical inertness,” said lead author Joel Wang, a researcher in the Engineering Quantum Systems group at the MIT Research Laboratory for Electronics.
On both sides of the hBN, the MIT researchers used 2D superconducting material, niobium diselenide. One of the more complicated aspects of capacitor manufacturing was working with niobium diselenide, which oxidizes within seconds when exposed to air, according to Wang. This requires the condenser assembly to take place in a glove box filled with argon gas.
While this would seem to complicate the increase in production of these capacitors, Wang does not see it as a limiting factor.
“What determines the quality factor of the capacitor are the two interfaces between the two materials,” said Wang. “Once the sandwich has been made, the two interfaces are ‘sealed’ and we don’t see any noticeable degradation over time when exposed to the atmosphere.”
This lack of degradation is due to the fact that approximately 90 percent of the electric field is contained within the sandwich structure, so oxidation of the outer surface of the niobium diselenide no longer plays a significant role. This ultimately makes the capacitor footprint much smaller and takes into account the reduction in cross talk between neighboring qubits.
“The main challenge to increase production will be the wafer-scale growth of hBN and 2D superconductors such as [niobium diselenide]and how these films can be stacked on a wafer scale, ”Wang added.
Wang believes this research has shown that 2D hBN is a good isolator candidate for superconducting qubits. He says the groundwork the MIT team has done will serve as a road map for using other 2D hybrid materials to build superconducting circuits.